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Re: 727 RPM limit



rr wrote:
> 
> Figuring you still need some resolution to get the plugs fired at
> the right time, figure the clock is ~65.5KHz, [...]
> 
> I'm not sure that the math I did is correct. Any out there ever
> try to take an ecm to the limit? Maybe even on a bench?

I've sort of done this.  Using my debugger board (mentioned in a
different thread), I've fed various frequency signals (simulated DRPs)
into an ECM.  I haven't kept track of exactly what frequencies I've
used.  I've usually chosen a frequency that was convenient for display
on a O-scope.  That means a sweep rate of about 1ms/cm.  That would mean
a DRP frequency approaching 1KHz.  Hmmm, I might have done some testing
where the DRP was the 2+ MHz E clock divided by 2^13.  That would be a
DRP rate of 256 Hz.  I've never noticed a problem with the hardware not
being to keep up.

An alternate data point.  Using a C3 ECM, I connected a PWM output to
the VSS input.  I found that the "delay" from the ideal PWM transition
time to the time stamp latched for the VSS was about 90 cycles of the
64KHz clock.  (Or was it 90 cycles of 32KHz?)  Anyway, the 90 cycles
would include the delay in the PWM output plus the delay in recognizing
a VSS transition plus any software debounce that might be performed on
the VSS signal.

-- 
Ludis Langens                               ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies:  http://www.cruzers.com/~ludis/


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